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Code: EP106

Description

The option of Flip Chip chip connection starts off with a comparison of properties and performance between wire bonding, TAB and Flip Chip, from which it is evident that Flip Chip offers considerable advantages.

A description of Flip Chip leads into the dominant players’, particularly IBM’s, approach such as the C4 technique. The state of advancement of C4 vs TAB vs wirebonding, and their potential, is illustrated. Illustrations show that substrates have to be multilayered with fine lines to provide interconnection for flip-chip. The history of flip chip is also traced from which time the construction of the bumps has advanced with the development of new solder alloys, suitable combinations of PB, Sn, and In are considered. The increase in I/O from peripheral to a full area array of bumps and the consequent interconnection benefit are illustrated. Developments are seen to include bump alloys and stacked structures to achieve compliance for large chips. Infra-red alignment enables the face down assembly of Flip Chip.

Alternative substrates and interconnections include co-fired ceramic, copper thin film on ceramic and multilayered thin-film on polyimide.