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HIGH SPEED PCB DESIGN

by Lee W. Ritchey & James C. Blankenhorn

ISBN: 1-882812 04-2

REFERENCE BOOKS

Code: EP48

Contents of this page:

Description
Table of Contents

Description

Designing products that use high speed circuitry is more common today. It used to be that when we talked about high speed such as ASTTL, ALSTTL, BiCMOS and VHCMOS, we could immediately experience noise problems that we did not have before.

Semiconductor components have become faster to meet the speed demands for high speed operation. As a result of this, the circuits create more noise. When the noise margins of the design are exceeded, then margin or total failures occur.

To understand the high speed problems that faster circuitry is causing, this book covers topics including transmission line principles and operation, routing and interconnecting, line width affects, trace spacing effects on coupling decoupling, planes, sequencing, propagation delays, stubs, terminators and controlling noise. All this is explained in simple, easy to understand terms and language. A degree in advanced maths is not required.

Included with this book is a new workbook section that now helps you to apply the information covered and put it into a meaningful and useful format. This will help you build up the database of information that is required to successfully design high speed products.

Table of Contents

Considerations for High Speed Circuits

Symptoms of High Speed Malfunctions

Definition of High Speed

Transmission Line Model

How to Measure Impedance

Sources of High Speed Noise

Properties of Material and Packages

Conductors

Dielectrics Used in the Manufacture of PCBs

Characteristics of IC Packages

Types of Transmission Line

Surface Microstrip

Buried or Imbedded Microstrip

Centred Stripline

Off-Centre or Asymmetrical

Propagation Delay and Capacitance per Unit Length

Uses of Transmission Line Types

Effects of Various Physical Features on Impedance

Via Characteristics

Right Angle Bends

Coupling

Current Methodologies

Definition of Coupling

Capacitance Coupling

Inductive Coupling

Preparing a Noise Budget

Systems Noise Margins

Sources of Noise

Assigning a Noise Budget to Noise Sources

Establishing a High Speed Set of Design Rules

Sequencing Nets

Routability Analysis

Coupling & Parallelism Rules

Fabrication Rule Set

Controlling Impedance

Sources of Mismatches

Sequencing or Scheduling Loads and Drivers

Stubs and Effects

Trace Width Changes

Layer Changes

Lack of Poor Terminations

When Terminating Isn’t Possible

 

 

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 Page last revised 11.02.05

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